Testing Harmonic's math agent: it asks sharp clarifying questions to formally verify Verilog

thomasahle · x · 2026-10-29

Researcher thomasahle is trying Harmonic's math/formal-verification agent and likes its multi-clarifying-question setup. Screenshots show the agent spotting inferred latches in FPDivide.v's combinational always block, proposing two guarded default assignments to unblock formal verification, and asking the user to pin down the exact reference behavior (truncation vs IEEE-754 rounding), with quick-answer options. He notes the queue is so long he left for coffee before the 10-minute auto-pick.

Related event: Developer tests Harmonic's Aristotle: proves Verilog floating-point divider but lags on progress and concurrency(5 posts)→

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