Only defense contractors have wafer-scale GaN HEMT + InP HBT on CMOS, DARPA-funded
jwt0625 · x · 2026-09-29
TSMC has GaN and Intel has InP, but only big defense contractors integrate GaN HEMTs and InP HBTs heterogeneously with wafer-scale CMOS. Notably, GaN faces up so heat spreads into the SiC substrate before sinking into the Si CMOS chip, while InP faces down for high-speed interconnects — joined via 15 µm-pitch Au-Au thermal compression bonding, funded by DARPA's DAHI program.
More from Infra
- Qdrant unveils Constella research preview: swap query embedding models without re-embedding your docs — qdrant_engine · 2026-09-29
- 124M model with a 65B embedding sparks the AFED disaggregation joke — YouJiacheng · 2026-09-29
- IFM Lab releases xLLM training library: hot-swappable tokenizers and 1k-line Jinja chat templates — HildeKuehne · 2026-09-29
- Oracle's 30-year spread widens to +180bp as Project Jupiter power woes trigger force majeure — julsimon · 2026-09-29
- Bain: AI needs $6T annual revenue by 2031 to justify data-center spending, $4.2T gap remains — rohanpaul_ai · 2026-09-29
- Cost math: Meta Muse would run $51 per user, making 'free for 4B users' a steep climb — bookwormengr · 2026-09-29