Engineers Push Back on Silicon Photonics Interconnect Claims

Engineers are challenging several silicon photonics claims, from questionable low-loss SiN metrics and retro-style onboard optics in the MOSAIC demo to misaligned coupling tolerances and Figure-of-Merit metrics that omit link latency.

2026-08-22 ~ 2026-08-22 · 4 related posts

• SiPho Loss Reality Check: The Trick Behind Low-Loss SiN — jwt0625 · 2026-08-22
• On-board optics discussion: grating couplers tolerance and bandwidth — jwt0625 · 2026-08-22
• MOSAIC demo features on-board optics, echoing 2010s tech — jwt0625 · 2026-08-22
• Engineer notes CPO figure-of-merit leaves out link latency, cites HPC photonics paper — jwt0625 · 2026-08-22