Harmonic's circuit proofs lack verifiable artifacts; Claude could do it for far less than $63
thomasahle · x · 2026-10-29
thomasahle criticizes Harmonic's generated circuit results: the output files contain no actual proofs and no transpiled Verilog-to-Lean versions, so third parties can't verify correctness with Lean themselves. He also notes the system runs simulations only after supposedly proving the circuit correct, despite simulations being much faster. He argues Claude could both transpile the code and prove it in Lean at a far lower cost than $63, highlighting a transparency gap in automated theorem-proving products.
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