Harmonic's math model formally proves FP division properties of a 200-line Verilog file
thomasahle · x · 2026-10-29
A developer shared results from using Harmonic's theorem-proving model on hardware: for a simple 200-line Verilog floating-point division file, the model proved properties including quotient MSB setting and bit-exact round-toward-zero division for normal inputs, with proved/refuted properties shown live in the UI.
He also flagged a UX pain point: long stalls with no progress indication or visible chain of thought. A concrete example of AI formal verification landing in hardware correctness.
More from Models
- Persona prompt pins models at ~35% on SIMMER benchmark regardless of Claude or DeepSeek — amplifiedamp · 2026-10-29
- OpenAI Terra 6.1 in practice: cheap model plus tiered follow-up beats what benchmarks miss — IamNotGorbachev · 2026-10-29
- qwen-code PR Sizes All Qwen4 Models at 1M-Token Context Window — haider1 · 2026-10-29
- Developer flags Claude weekly limit showing 2% used with zero activity after reset — umeshonai · 2026-10-29
- 'Persona neurons' discourse overhyped, but tiny perturbations breaking alignment is telling — aiamblichus · 2026-10-29
- LocalLLaMA users draft a Qwen4 wishlist: 512K context and plainer answers — perelmanych · 2026-10-29