Harmonic's Aristotle Proves 185 Properties of a 12.2M-Gate Chip Block, Cuts Power ~26%
satnam6502 · x · 2026-10-29
Harmonic's formal reasoning system Aristotle handled Tensordyne's hardest verification block: 12.2 million gate equivalents, proving 185 properties and refuting 56, finding bugs up to 110,000 cycles deep. It then wrote RTL from spec and cut power 26%, re-proving at every step. Verification engineer Jonathan Ko called it "unthinkable with traditional tools" — a landmark for proof-driven synthesis in trustworthy hardware design.
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