Silicon microring modulators push past 200Gb/s per lane to cut AI optical I/O power
jwt0625 · x · 2026-10-01
A new arXiv paper analyzes depletion-mode silicon microring modulators for high-bandwidth optical I/O between AI processors, with device-circuit co-design targeting rates beyond 200Gb/s per lane.
The key problem: at 200Gb/s+, the DSP doing equalization and forward-error correction can consume up to half of the optical module's power. The paper connects junction and cavity physics — modulation efficiency, capacitance, optical loss, coupling — to bandwidth and drive requirements, and covers laser detuning, optimal operating points, gain-bandwidth product, optical self-heating, photocarriers, and heater tuning and wavelength assignment in DWDM arrays.
The poster also cites Yuan 2024's 5×200Gbps two-segment Z-shape junction silicon chip and jokes about a Hilbert-curve junction to maximize overlap.
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