Emulating memory access: FEX-Emu devs on the x86-to-ARM memory model minefield

blaizedsouza · x · 2026-09-19

A Hackaday piece walks through how the FEX-Emu developers tackle memory access emulation when translating x86 code to ARM.

• Memory model mismatch: x86 offers strong Total Store Ordering guarantees, while ARM deliberately uses a weaker model for performance, so visibility of writes between cores isn't straightforward.
• Workarounds: emulators can translate x86 memory ops into ARM acquire/release, but doing it for nearly every reference is costly; newer ARM extensions like LRCPC help, and Apple Silicon added an x86-compatible TSO mode with little overhead.
• The ugly parts: x86's routine unaligned accesses and strong cache-line atomicity force FEX to catch alignment faults and dynamically patch barriers into translated code; split-lock operations are worst, sometimes requiring kernel excursions and running hundreds or thousands of times slower.

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