MLC's New GPU Execution Model Chapter Explains Blackwell Threads, Memory Spaces and TMA
blaizedsouza · x · 2026-09-19
MLC (mlc.ai) released a new GPU Execution Model chapter for modern ML-systems-oriented GPU programming.
- Thread hierarchy: thread, warp, warpgroup, CTA, cluster, and grid map to different cooperation scales — a TMA copy is launched by one thread, a TMEM accumulator read spans 4 warps, and a 2-CTA cooperative MMA spans two CTAs.
- Memory spaces: GMEM, SMEM, TMEM, and registers trade off capacity, latency, and access scope; clusters add DSMEM for cross-CTA shared memory access.
- Hardware engines: CUDA cores handle address math and control flow, Tensor Cores do matrix math, TMA moves data asynchronously.
- Grounded in the Blackwell SM architecture, ending with a GEMM pipeline showing how compute overlaps with data movement.
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