RISC-V AI Supernode Architecture Debuts
智东西 · wechat · 2026-07-18
The article introduces the RISC-V AI compute supernode architecture showcased by奕行智能 at WAIC2026: based on the self-developed Epoch cloud high-compute chip, ELink high-speed interconnect, liquid-cooled servers, and a full-stack software ecosystem. It aims to break through the "compute wall" and "ecosystem wall" of the large model era via a system-level solution.
Key highlights include:
- Chip & Interconnect: Epoch is China's first RISC-V AI cloud high-compute chip supporting FP8. The next generation will expand to lower bit-width formats like EXFP4 and MXFP4, while increasing compute, storage capacity, and bandwidth.
- Supernode Capabilities: A single cabinet can provide aggregate bandwidth at the 100TB level, supporting 32- to 128-card Scale-Up full interconnectivity, scalable to 10,000-card clusters.
- Software Stack: The EVACA integrated software stack introduces an "operator library + compiler + Agent-driven" execution paradigm. The KernelFab hub enables a closed-loop "compile, run, measure, diagnose, optimize" process in real/simulated hardware environments, compressing operator development time from weeks to days.
- Ecosystem & Deployment: The company is collaborating with multiple parties to build a full-stack RISC-V supernode AI Token factory, targeting deployments across internet, telecom, finance, and energy sectors.
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