AI Designs 64-bit RISC-V Chip in One Prompt at IET Conference

At the IET REACH 2026 computer architecture conference in London, Vivienne Reddi demonstrated AI designing a custom 64-bit RISC-V processor from a single prompt, alongside a Grand Challenge to build a sub-3W RISC-V XR chip.

2026-11-09 ~ 2026-11-09 · 2 related posts

• AI chip design demo: one prompt for a 64-bit RISC-V processor under 3W TDP — satnam6502 · 2026-11-09
• Grand challenge: design a 3W, 64-bit RISC-V compute subsystem for real-time mobile XR on 3nm — satnam6502 · 2026-11-09