Helion's compile-time heuristics skip autotuning, beating handwritten Triton kernels by 18%
PyTorch · x · 2026-11-13
PyTorch's kernel DSL Helion now picks configs at compile time by analyzing kernel IR and dataflow — classifying kernels as matmul, reduction, or pointwise and directly emitting block sizes, warps, and stages with zero autotuning. On H100: across 96 cells over nine linear-attention variants, it beats handwritten Triton in Flash Linear Attention by 18% forward (12% with backward) and vLLM's handwritten CUDA reduction kernels by 27%, and is 2.13x faster than Helion's previous no-autotune default. Context: tuning one paged-attention kernel across 72 shapes previously took 10–25 hours of autotuning. Near-autotuned performance is now free.
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