AMD Zen 6 deep dive: cheaper branch mispredicts and a return to Zen 3/4 integer scheduling
jedisct1 · x · 2026-11-11
Chips and Cheese publishes a deep microarchitecture analysis of AMD's next-gen Zen 6 CPU core family by George Cozma:
- Overview: Zen 6 is a natural evolution of Zen 5 with expanded OoO structures, but digging deeper reveals heavy reworking reminiscent of the Zen 1→Zen 2 jump. The integer scheduler layout returns to a Zen 3/Zen 4-style arrangement.
- Branch prediction: Building on Zen 5's best-in-class direction predictor, Zen 6 cuts branch mispredict recovery cost from 3.5–4ns to 3–3.5ns per branch, and sustains 2 branches/cycle within the L1 instruction cache. Beyond L1i footprint it falls to 1 branch/cycle, except the 64B test hitting the L2 BTB at 4 cycles/branch.
- Differences between Zen 6 and Zen 6c also illuminate AMD's microarchitecture strategy.
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