qwenGPU embeds a SIMT GPU inside Qwen3.5-2B weights, generating its own CUDA launches
ccerrato147 · x · 2026-11-02
A project called qwenGPU puts a SIMT GPU inside Qwen3.5-2B's weights: 45 compiled kernel layers run ahead of Qwen's own, with Gated DeltaNet layers repurposed as registers and memory.
It runs real CUDA in forward passes — the host compiles the kernel to PTX and loads it, then the model itself generates every step of each launch token by token: every register, branch, and memory write. Specs: 4-lane warps, a 4-stage pipeline, 15 registers per lane, and 126 words of global memory, all held in DeltaNet state.
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