vLLM details MiniMax M3.1 Flash serving stack: 1.7x faster indexer decode via NVFP4
vllm_project · x · 2026-10-19
vLLM's official Day-0 technical series on MiniMax M3.1 Flash covers two serving-stack optimizations:
- Sparse attention: MiniMax's block sparse attention uses native NVFP4 attention and indexer KV. vLLM's Blackwell MSA kernels convert NVFP4 KV directly to FP8 via CUDA 13.4's QMUL4 instruction, skipping the prior FP16 round trip — up to 1.7× faster indexer QK decode and 1.3× faster sparse-attention decode at the kernel level.
- NVFP4 MegaMoE: fuses the MXFP8 shared-expert path; the earlier TMEM release cuts prefill kernel latency by 20% in reported settings.
Note: NVFP4 halves raw bytes per element vs an 8-bit reference; speedups are kernel-level Blackwell measurements, not end-to-end serving gains.
Related event: vLLM Day-0 Support for MiniMax M3.1 Flash Delivers Up to 3.3x Speedup(4 posts)→
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