Every x86 boot replays 40 years of computing history in milliseconds, in 4 stages
lauriewired · x · 2026-10-16
LaurieWired breaks down the x86 boot sequence: every power-on replays computing history in milliseconds. Stage 1 runs 16-bit Real Mode like an 8086 from 1978 (15-30 instructions, building a writable stack+heap). Stage 2 switches to 32-bit Protected Mode like a 386, executing tens of millions of instructions and using L2/L3 "cache-as-RAM" (Intel's NEM) to kickstart DDR5 memory training. Stage 3 enters 64-bit Long Mode (AMD64-era), enumerating PCIe devices, GPU, and bootloader. Stage 4 wakes each secondary core through the same process, faster now that main RAM is warmed up. She likens cache-as-RAM to an APU spooling a main turbine.
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