Gelsinger: AI speeds chip design but chips still take quarters; the whole flow needs rethinking
ai · x · 2026-10-13
Former Intel CEO Pat Gelsinger, in an a16z conversation, argues AI will make chip design faster but not easier. Key constraints:
- Silicon still takes quarters to manufacture regardless of design speed
- Memory bandwidth and advanced packaging are major choke points
- Copper interconnect is giving way to optical
- Energy capacity is becoming economic capacity
He predicts today's explosion of specialized AI chips will consolidate around fewer architectures, and wants to see a "VMware for agents" built for agent infrastructure.
Reposter Kevin Gubbi extends the point: chip design workflows and abstractions were built around human and traditional-algorithm limitations. From EDA and verification to manufacturing and packaging, the question isn't how AI speeds up the existing flow, but how much of that flow needs to exist at all.
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