Leak: CXMT Supplies TSV Embedded DRAM Dies for Chinese cHBM, Stacking Done In-House or via Local OSAT
zephyr_z9 · x · 2026-09-17
In a discussion about a Chinese chipmaker's designs, zephyrz9 shares supply-chain details:
- The vendor's HiZQ product uses its own cHBM (custom HBM), while HiBL is based on stacked LPDDR
- The TSV embedded DRAM dies for HiZQ are sourced from CXMT
- Stacking is done in-house or in partnership with a Chinese OSAT
This offers a more concrete picture of China's HBM-class product supply chain: DRAM sourcing, TSV processing and the domestic path for stacking and packaging.
More from Infra
- How AI Agents Query Apache Iceberg Data Lakes via MCP — codingdecently · 2026-09-17
- Huawei expected to compress chip roadmap again as AI speeds up EDA before 2030 — teortaxesTex · 2026-09-17
- Intel Ships OpenVINO 2026.4: Qwen3-VL, FLUX.2 on NPU, MTP Speculative Decoding — jacek2023 · 2026-09-17
- How to locally run a Qwen 3.8 Next model at Claude Opus level for under $4,000 — ironicstatistic · 2026-09-17
- DiffusionGemma hits 22 structured generations/sec on a DGX Spark at concurrency 32 — bodonoghue85 · 2026-09-17
- OpenAI's Jalapeño chip wasn't AI-designed: 100+ ex-Google TPU engineers and Broadcom were — JFPuget · 2026-09-17