Hardware veteran: low-precision gains nearly exhausted, true sparsity is AI's next 10x
blelbach · x · 2026-09-17
Hardware observer blelbach laid out where AI compute scaling goes next:
- CMOS shrinks have delivered power efficiency rather than raw speed since 2015, and that path is nearly done;
- New packaging (stacking, substrates) keeps "chip" scaling alive on the datacenter side, with some room left;
- The largest remaining direction is architectural innovation around information density and specialized compute;
- The low-precision gold mine is ending — FP3/FP2 and bitnets may be the last stops.
In a follow-up he notes today's machines are dense linear algebra engines (a few with block sparsity), and radically different chips supporting true sparsity may be needed to find the next 10x.
Related event: Veteran: CMOS Scaling Is Tapped Out, Sparsity Is AI's Next 10x(4 posts)→
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