Engineers Debate PIC Design: Foundry Incompetence and Lagging COUPE
jwt0625 · x · 2026-08-23
This is a technical discussion regarding Photonic Integrated Circuit (PIC) design. The author responds to @semiDL, criticizing current Foundry incompetence:
- Design vs. Foundry: Good PDK designers can often beat standard foundry components by making specific trade-offs (e.g., size for loss). The foundry should provide the best basic components.
- Bottlenecks: Design is getting easier; the real bottleneck is the foundry's willingness to test and iterate.
- Process Lag: If the packaging house is not part of the foundry, communication and full-process iteration can be more than 2x slower.
- COUPE Tech: The author argues COUPE still sucks, TSMC is late to the party, and lacks motivation due to privileged status, though they have finally realized photonics is important.
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