T-Head RISC-V adds Day 0 support for Qwen-3.8, C950 hits 30 tps
pstAsiatech · x · 2026-08-18
Alibaba's T-Head RISC-V team announced Day 0 support for the Qwen-3.8 model, specifically the 27B version.
Technical Details:
- Performance: The 64-core C950 CPU (with RVV support) achieves a decoding speed of 30 tps and a Time to First Token (TTFT) of 1.9s.
- Deployment: T-Head plans to use these chips in its own data centers for smaller model inference and for various edge applications.
- Integration: The C950 is paired with specialized AI accelerators like the Jiangyuan Technology D20 and Rockchip RK1828.
Significance: This move strengthens RISC-V's position in the AI PC and edge AI inference markets.
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